Alif Semiconductor /AE302F80C1557LE_CM55_HP_View /IRQRTR /IRQRTR_SHD_INT_CFG

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Interpret as IRQRTR_SHD_INT_CFG

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (Val_0x0)ICI_EN

ICI_EN=Val_0x0

Description

IRQRTR Shared Interrupt Configuration Register

Fields

ICI_EN

Interrupt Controller Enable. Each bit indicates whether the interrupt selected by the IRQRTR_SHD_INT_SEL[INT_SEL] field isrouted to the ICI interface associated with the bit, starting with bit 0 for ICI0 to bit 3 for ICI3: Note: Bits where the respective bit in the IRQRTR_SHD_INT_INFO[ICI_DST] field is 0x0 are reserved andtreated as RAZ/WI.

0 (Val_0x0): Shared interrupt is not routed to the ICI[n]

1 (Val_0x1): Shared interrupt is routed to the ICI[n]

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